00001 /* m68hc11/ports_def.h -- Definition of 68HC11 ports 00002 Copyright 1999, 2000, 2002, 2003 Free Software Foundation, Inc. 00003 Written by Stephane Carrez (stcarrez@nerim.fr) 00004 00005 This file is part of GDB, GAS, and the GNU binutils. 00006 00007 GDB, GAS, and the GNU binutils are free software; you can redistribute 00008 them and/or modify them under the terms of the GNU General Public 00009 License as published by the Free Software Foundation; either version 00010 1, or (at your option) any later version. 00011 00012 GDB, GAS, and the GNU binutils are distributed in the hope that they 00013 will be useful, but WITHOUT ANY WARRANTY; without even the implied 00014 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 00015 the GNU General Public License for more details. 00016 00017 You should have received a copy of the GNU General Public License 00018 along with this file; see the file COPYING. If not, write to the Free 00019 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 00020 00021 #ifndef _M68HC11_PORTS_DEF_E_H 00022 #define _M68HC11_PORTS_DEF_E_H 00023 00024 /* Flags for the definition of the 68HC11 & 68HC12 CCR. */ 00025 #define M6811_S_BIT 0x80 /* Stop disable */ 00026 #define M6811_X_BIT 0x40 /* X-interrupt mask */ 00027 #define M6811_H_BIT 0x20 /* Half carry flag */ 00028 #define M6811_I_BIT 0x10 /* I-interrupt mask */ 00029 #define M6811_N_BIT 0x08 /* Negative */ 00030 #define M6811_Z_BIT 0x04 /* Zero */ 00031 #define M6811_V_BIT 0x02 /* Overflow */ 00032 #define M6811_C_BIT 0x01 /* Carry */ 00033 00034 /* 68HC11 register address offsets (range 0..0x3F or 0..64). 00035 The absolute address of the I/O register depends on the setting 00036 of the M6811_INIT register. At init time, the I/O registers are 00037 mapped at 0x1000. Address of registers is then: 00038 00039 0x1000 + M6811_xxx 00040 */ 00041 #define M6811_PORTA 0x00 /* Port A register */ 00042 #define M6811__RES1 0x01 /* Unused/Reserved */ 00043 #define M6811_PIOC 0x02 /* Parallel I/O Control register */ 00044 #define M6811_PORTC 0x03 /* Port C register */ 00045 #define M6811_PORTB 0x04 /* Port B register */ 00046 #define M6811_PORTCL 0x05 /* Alternate latched port C */ 00047 #define M6811__RES6 0x06 /* Unused/Reserved */ 00048 #define M6811_DDRC 0x07 /* Data direction register for port C */ 00049 #define M6811_PORTD 0x08 /* Port D register */ 00050 #define M6811_DDRD 0x09 /* Data direction register for port D */ 00051 #define M6811_PORTE 0x0A /* Port E input register */ 00052 #define M6811_CFORC 0x0B /* Compare Force Register */ 00053 #define M6811_OC1M 0x0C /* OC1 Action Mask register */ 00054 #define M6811_OC1D 0x0D /* OC1 Action Data register */ 00055 #define M6811_TCTN 0x0E /* Timer Counter Register */ 00056 #define M6811_TCTN_H 0x0E /* " " " High part */ 00057 #define M6811_TCTN_L 0x0F /* " " " Low part */ 00058 #define M6811_TIC1 0x10 /* Input capture 1 register */ 00059 #define M6811_TIC1_H 0x10 /* " " " High part */ 00060 #define M6811_TIC1_L 0x11 /* " " " Low part */ 00061 #define M6811_TIC2 0x12 /* Input capture 2 register */ 00062 #define M6811_TIC2_H 0x12 /* " " " High part */ 00063 #define M6811_TIC2_L 0x13 /* " " " Low part */ 00064 #define M6811_TIC3 0x14 /* Input capture 3 register */ 00065 #define M6811_TIC3_H 0x14 /* " " " High part */ 00066 #define M6811_TIC3_L 0x15 /* " " " Low part */ 00067 #define M6811_TOC1 0x16 /* Output Compare 1 register */ 00068 #define M6811_TOC1_H 0x16 /* " " " High part */ 00069 #define M6811_TOC1_L 0x17 /* " " " Low part */ 00070 #define M6811_TOC2 0x18 /* Output Compare 2 register */ 00071 #define M6811_TOC2_H 0x18 /* " " " High part */ 00072 #define M6811_TOC2_L 0x19 /* " " " Low part */ 00073 #define M6811_TOC3 0x1A /* Output Compare 3 register */ 00074 #define M6811_TOC3_H 0x1A /* " " " High part */ 00075 #define M6811_TOC3_L 0x1B /* " " " Low part */ 00076 #define M6811_TOC4 0x1C /* Output Compare 4 register */ 00077 #define M6811_TOC4_H 0x1C /* " " " High part */ 00078 #define M6811_TOC4_L 0x1D /* " " " Low part */ 00079 #define M6811_TOC5 0x1E /* Output Compare 5 register */ 00080 #define M6811_TOC5_H 0x1E /* " " " High part */ 00081 #define M6811_TOC5_L 0x1F /* " " " Low part */ 00082 #define M6811_TCTL1 0x20 /* Timer Control register 1 */ 00083 #define M6811_TCTL2 0x21 /* Timer Control register 2 */ 00084 #define M6811_TMSK1 0x22 /* Timer Interrupt Mask Register 1 */ 00085 #define M6811_TFLG1 0x23 /* Timer Interrupt Flag Register 1 */ 00086 #define M6811_TMSK2 0x24 /* Timer Interrupt Mask Register 2 */ 00087 #define M6811_TFLG2 0x25 /* Timer Interrupt Flag Register 2 */ 00088 #define M6811_PACTL 0x26 /* Pulse Accumulator Control Register */ 00089 #define M6811_PACNT 0x27 /* Pulse Accumulator Count Register */ 00090 #define M6811_SPCR 0x28 /* SPI Control register */ 00091 #define M6811_SPSR 0x29 /* SPI Status register */ 00092 #define M6811_SPDR 0x2A /* SPI Data register */ 00093 #define M6811_BAUD 0x2B /* SCI Baud register */ 00094 #define M6811_SCCR1 0x2C /* SCI Control register 1 */ 00095 #define M6811_SCCR2 0x2D /* SCI Control register 2 */ 00096 #define M6811_SCSR 0x2E /* SCI Status register */ 00097 #define M6811_SCDR 0x2F /* SCI Data (Read => RDR, Write => TDR) */ 00098 #define M6811_ADCTL 0x30 /* A/D Control register */ 00099 #define M6811_ADR1 0x31 /* A/D, Analog Result register 1 */ 00100 #define M6811_ADR2 0x32 /* A/D, Analog Result register 2 */ 00101 #define M6811_ADR3 0x33 /* A/D, Analog Result register 3 */ 00102 #define M6811_ADR4 0x34 /* A/D, Analog Result register 4 */ 00103 #define M6811__RES35 0x35 00104 #define M6811__RES36 0x36 00105 #define M6811__RES37 0x37 00106 #define M6811__RES38 0x38 00107 #define M6811_OPTION 0x39 /* System Configuration Options */ 00108 #define M6811_COPRST 0x3A /* Arm/Reset COP Timer Circuitry */ 00109 #define M6811_PPROG 0x3B /* EEPROM Programming Control Register */ 00110 #define M6811_HPRIO 0x3C /* Highest priority I-Bit int and misc */ 00111 #define M6811_INIT 0x3D /* Ram and I/O mapping register */ 00112 #define M6811_TEST1 0x3E /* Factory test control register */ 00113 #define M6811_CONFIG 0x3F /* COP, ROM and EEPROM enables */ 00114 00115 00116 /* Flags of the CONFIG register (in EEPROM). */ 00117 #define M6811_NOSEC 0x08 /* Security mode disable */ 00118 #define M6811_NOCOP 0x04 /* COP system disable */ 00119 #define M6811_ROMON 0x02 /* Enable on-chip rom */ 00120 #define M6811_EEON 0x01 /* Enable on-chip eeprom */ 00121 00122 /* Flags of the PPROG register. */ 00123 #define M6811_BYTE 0x10 /* Byte mode */ 00124 #define M6811_ROW 0x08 /* Row mode */ 00125 #define M6811_ERASE 0x04 /* Erase mode select (1 = erase, 0 = read) */ 00126 #define M6811_EELAT 0x02 /* EEPROM Latch Control */ 00127 #define M6811_EEPGM 0x01 /* EEPROM Programming Voltage Enable */ 00128 00129 /* Flags of the PIOC register. */ 00130 #define M6811_STAF 0x80 /* Strobe A Interrupt Status Flag */ 00131 #define M6811_STAI 0x40 /* Strobe A Interrupt Enable Mask */ 00132 #define M6811_CWOM 0x20 /* Port C Wire OR mode */ 00133 #define M6811_HNDS 0x10 /* Handshake mode */ 00134 #define M6811_OIN 0x08 /* Output or Input handshaking */ 00135 #define M6811_PLS 0x04 /* Pulse/Interlocked Handshake Operation */ 00136 #define M6811_EGA 0x02 /* Active Edge for Strobe A */ 00137 #define M6811_INVB 0x01 /* Invert Strobe B */ 00138 00139 /* Flags of the SCCR1 register. */ 00140 #define M6811_R8 0x80 /* Receive Data bit 8 */ 00141 #define M6811_T8 0x40 /* Transmit data bit 8 */ 00142 #define M6811__SCCR1_5 0x20 /* Unused */ 00143 #define M6811_M 0x10 /* SCI Character length */ 00144 #define M6811_WAKE 0x08 /* Wake up method select (0=idle, 1=addr mark) */ 00145 00146 /* Flags of the SCCR2 register. */ 00147 #define M6811_TIE 0x80 /* Transmit Interrupt enable */ 00148 #define M6811_TCIE 0x40 /* Transmit Complete Interrupt Enable */ 00149 #define M6811_RIE 0x20 /* Receive Interrupt Enable */ 00150 #define M6811_ILIE 0x10 /* Idle Line Interrupt Enable */ 00151 #define M6811_TE 0x08 /* Transmit Enable */ 00152 #define M6811_RE 0x04 /* Receive Enable */ 00153 #define M6811_RWU 0x02 /* Receiver Wake Up */ 00154 #define M6811_SBK 0x01 /* Send Break */ 00155 00156 /* Flags of the SCSR register. */ 00157 #define M6811_TDRE 0x80 /* Transmit Data Register Empty */ 00158 #define M6811_TC 0x40 /* Transmit Complete */ 00159 #define M6811_RDRF 0x20 /* Receive Data Register Full */ 00160 #define M6811_IDLE 0x10 /* Idle Line Detect */ 00161 #define M6811_OR 0x08 /* Overrun Error */ 00162 #define M6811_NF 0x04 /* Noise Flag */ 00163 #define M6811_FE 0x02 /* Framing Error */ 00164 #define M6811__SCSR_0 0x01 /* Unused */ 00165 00166 /* Flags of the BAUD register. */ 00167 #define M6811_TCLR 0x80 /* Clear Baud Rate (TEST mode) */ 00168 #define M6811__BAUD_6 0x40 /* Not used */ 00169 #define M6811_SCP1 0x20 /* SCI Baud rate prescaler select */ 00170 #define M6811_SCP0 0x10 00171 #define M6811_RCKB 0x08 /* Baud Rate Clock Check (TEST mode) */ 00172 #define M6811_SCR2 0x04 /* SCI Baud rate select */ 00173 #define M6811_SCR1 0x02 00174 #define M6811_SCR0 0x01 00175 00176 #define M6811_BAUD_DIV_1 (0) 00177 #define M6811_BAUD_DIV_3 (M6811_SCP0) 00178 #define M6811_BAUD_DIV_4 (M6811_SCP1) 00179 #define M6811_BAUD_DIV_13 (M6811_SCP1|M6811_SCP0) 00180 00181 /* Flags of the SPCR register. */ 00182 #define M6811_SPIE 0x80 /* Serial Peripheral Interrupt Enable */ 00183 #define M6811_SPE 0x40 /* Serial Peripheral System Enable */ 00184 #define M6811_DWOM 0x20 /* Port D Wire-OR mode option */ 00185 #define M6811_MSTR 0x10 /* Master Mode Select */ 00186 #define M6811_CPOL 0x08 /* Clock Polarity */ 00187 #define M6811_CPHA 0x04 /* Clock Phase */ 00188 #define M6811_SPR1 0x02 /* SPI Clock Rate Select */ 00189 #define M6811_SPR0 0x01 00190 00191 /* Flags of the SPSR register. */ 00192 #define M6811_SPIF 0x80 /* SPI Transfer Complete flag */ 00193 #define M6811_WCOL 0x40 /* Write Collision */ 00194 #define M6811_MODF 0x10 /* Mode Fault */ 00195 00196 /* Flags of the ADCTL register. */ 00197 #define M6811_CCF 0x80 /* Conversions Complete Flag */ 00198 #define M6811_SCAN 0x20 /* Continuous Scan Control */ 00199 #define M6811_MULT 0x10 /* Multiple Channel/Single Channel Control */ 00200 #define M6811_CD 0x08 /* Channel Select D */ 00201 #define M6811_CC 0x04 /* C */ 00202 #define M6811_CB 0x02 /* B */ 00203 #define M6811_CA 0x01 /* A */ 00204 00205 /* Flags of the CFORC register. */ 00206 #define M6811_FOC1 0x80 /* Force Output Compare 1 */ 00207 #define M6811_FOC2 0x40 /* 2 */ 00208 #define M6811_FOC3 0x20 /* 3 */ 00209 #define M6811_FOC4 0x10 /* 4 */ 00210 #define M6811_FOC5 0x08 /* 5 */ 00211 00212 /* Flags of the OC1M register. */ 00213 #define M6811_OC1M7 0x80 /* Output Compare 7 */ 00214 #define M6811_OC1M6 0x40 /* 6 */ 00215 #define M6811_OC1M5 0x20 /* 5 */ 00216 #define M6811_OC1M4 0x10 /* 4 */ 00217 #define M6811_OC1M3 0x08 /* 3 */ 00218 00219 /* Flags of the OC1D register. */ 00220 #define M6811_OC1D7 0x80 00221 #define M6811_OC1D6 0x40 00222 #define M6811_OC1D5 0x20 00223 #define M6811_OC1D4 0x10 00224 #define M6811_OC1D3 0x08 00225 00226 /* Flags of the TCTL1 register. */ 00227 #define M6811_OM2 0x80 /* Output Mode 2 */ 00228 #define M6811_OL2 0x40 /* Output Level 2 */ 00229 #define M6811_OM3 0x20 00230 #define M6811_OL3 0x10 00231 #define M6811_OM4 0x08 00232 #define M6811_OL4 0x04 00233 #define M6811_OM5 0x02 00234 #define M6811_OL5 0x01 00235 00236 /* Flags of the TCTL2 register. */ 00237 #define M6811_EDG1B 0x20 /* Input Edge Capture Control 1 */ 00238 #define M6811_EDG1A 0x10 00239 #define M6811_EDG2B 0x08 /* Input 2 */ 00240 #define M6811_EDG2A 0x04 00241 #define M6811_EDG3B 0x02 /* Input 3 */ 00242 #define M6811_EDG3A 0x01 00243 00244 /* Flags of the TMSK1 register. */ 00245 #define M6811_OC1I 0x80 /* Output Compare 1 Interrupt */ 00246 #define M6811_OC2I 0x40 /* 2 */ 00247 #define M6811_OC3I 0x20 /* 3 */ 00248 #define M6811_OC4I 0x10 /* 4 */ 00249 #define M6811_OC5I 0x08 /* 5 */ 00250 #define M6811_IC1I 0x04 /* Input Capture 1 Interrupt */ 00251 #define M6811_IC2I 0x02 /* 2 */ 00252 #define M6811_IC3I 0x01 /* 3 */ 00253 00254 /* Flags of the TFLG1 register. */ 00255 #define M6811_OC1F 0x80 /* Output Compare 1 Flag */ 00256 #define M6811_OC2F 0x40 /* 2 */ 00257 #define M6811_OC3F 0x20 /* 3 */ 00258 #define M6811_OC4F 0x10 /* 4 */ 00259 #define M6811_OC5F 0x08 /* 5 */ 00260 #define M6811_IC1F 0x04 /* Input Capture 1 Flag */ 00261 #define M6811_IC2F 0x02 /* 2 */ 00262 #define M6811_IC3F 0x01 /* 3 */ 00263 00264 /* Flags of Timer Interrupt Mask Register 2 (TMSK2). */ 00265 #define M6811_TOI 0x80 /* Timer Overflow Interrupt Enable */ 00266 #define M6811_RTII 0x40 /* RTI Interrupt Enable */ 00267 #define M6811_PAOVI 0x20 /* Pulse Accumulator Overflow Interrupt En. */ 00268 #define M6811_PAII 0x10 /* Pulse Accumulator Interrupt Enable */ 00269 #define M6811_PR1 0x02 /* Timer prescaler */ 00270 #define M6811_PR0 0x01 /* Timer prescaler */ 00271 #define M6811_TPR_1 0x00 /* " " prescale div 1 */ 00272 #define M6811_TPR_4 0x01 /* " " prescale div 4 */ 00273 #define M6811_TPR_8 0x02 /* " " prescale div 8 */ 00274 #define M6811_TPR_16 0x03 /* " " prescale div 16 */ 00275 00276 /* Flags of Timer Interrupt Flag Register 2 (M6811_TFLG2). */ 00277 #define M6811_TOF 0x80 /* Timer overflow bit */ 00278 #define M6811_RTIF 0x40 /* Read time interrupt flag */ 00279 #define M6811_PAOVF 0x20 /* Pulse accumulator overflow Interrupt flag */ 00280 #define M6811_PAIF 0x10 /* Pulse accumulator Input Edge " " " */ 00281 00282 /* Flags of Pulse Accumulator Control Register (PACTL). */ 00283 #define M6811_DDRA7 0x80 /* Data direction for port A bit 7 */ 00284 #define M6811_PAEN 0x40 /* Pulse accumulator system enable */ 00285 #define M6811_PAMOD 0x20 /* Pulse accumulator mode */ 00286 #define M6811_PEDGE 0x10 /* Pulse accumulator edge control */ 00287 #define M6811_RTR1 0x02 /* RTI Interrupt rates select */ 00288 #define M6811_RTR0 0x01 /* " " " " */ 00289 00290 /* Flags of the Options register. */ 00291 #define M6811_ADPU 0x80 /* A/D Powerup */ 00292 #define M6811_CSEL 0x40 /* A/D/EE Charge pump clock source select */ 00293 #define M6811_IRQE 0x20 /* IRQ Edge/Level sensitive */ 00294 #define M6811_DLY 0x10 /* Stop exit turn on delay */ 00295 #define M6811_CME 0x08 /* Clock Monitor enable */ 00296 #define M6811_CR1 0x02 /* COP timer rate select */ 00297 #define M6811_CR0 0x01 /* COP timer rate select */ 00298 00299 /* Flags of the HPRIO register. */ 00300 #define M6811_RBOOT 0x80 /* Read Bootstrap ROM */ 00301 #define M6811_SMOD 0x40 /* Special Mode */ 00302 #define M6811_MDA 0x20 /* Mode Select A */ 00303 #define M6811_IRV 0x10 /* Internal Read Visibility */ 00304 #define M6811_PSEL3 0x08 /* Priority Select */ 00305 #define M6811_PSEL2 0x04 00306 #define M6811_PSEL1 0x02 00307 #define M6811_PSEL0 0x01 00308 00309 #define M6811_IO_SIZE (0x40) 00310 00311 /* The I/O registers are represented by a volatile array. 00312 Address if fixed at link time. */ 00313 extern volatile unsigned char _io_ports[]; 00314 00315 #endif /* _M68HC11_PORTS_DEF_E_H */ 00316